08.30 am Registration 09.00 am Welcome 09.20 am Deep learning in the field of autonomous driving 10.00 am Emulation of Heterogeneous Embedded Architectures as Base for Virtual Test Drives 10.40 am Coffee Break 11.10 am Performance Analysis with AURIX™: From Free Tools to Fully Automated Analysis 11.50 am CNN Inference on Accelerators under Throughput Constraints 12.30 pm Lunch Break 1.30 pm Evaluate Design Decisions Early in the Process and Reduce Costs with Model-Based Design 2.10 pm Tracing Automotive Multi-Core Systems (AUTOSAR CP and AP) 2.50 pm Coffee Break 3.20 pm How to tackle the challenge of both high performance and safety in high voltage EV architectures 4.00 pm Functional safety in MultiCore systems with suitable Software components 4.40 pm Closing Speech
Deep learning in the field of autonomous drivingAn outline of the deployment process for advanced driver assistance system and autonomous driving
Emulation of Heterogeneous Embedded Architectures as Base for Virtual Test DrivesThe challenging task to realize autonomous driving vehicles requires the execution of a huge number of test drives, too. This causes a too large financial and temporal effort making necessary virtual test drives.
Virtual test drives assumes the existence of appropriate design environments which emulate embedded HPC computer architectures which are necessary for the execution of compute-intensive algorithms. In the talk an overview is given about the current state-of-the-art using commercial design systems, such as Synopsys’ Platform Architect, to emulate and simulate embedded heterogeneous HPC architectures, which consist of micro controllers, such as Infineon’s AURIX, ARM processors and accelerator cores such as a GPU.
Performance Analysis with AURIX™: From Free Tools to Fully Automated AnalysisAURIX™ Emulation Devices have very powerful multi-core trace capabilities on-chip. This is the basis for a broad portfolio of debug and performance analysis tooling.
In combination with the unique timing-predictable AURIX multi-core architecture this allows to design hard real time systems with the highest safety level.
CNN Inference on Accelerators under Throughput ConstraintsTerms like Deep Learning (DL) and Convolutional Neural Networks (CNNs) are everywhere these days. Many future applications (e.g., highly automated driving) require high performance and energy efficiency at the edge of computing. In this talk, we will introduce tightly coupled processor arrays (TCPAs) that might be used in an SoC platform as an accelerator for CNN inference. We demonstrate how to map CNNs efficiently in a spatial manner to TCPAs while ensuring a certain throughput.
Evaluate Design Decisions Early in the Process and Reduce Costs with Model-Based DesignSometimes you need to develop your system before the exact requirements or HW platform is fully defined, and sometimes you need to develop your system before the legacy software is adapted.
In this talk, you will learn how Model-Based Design will speed up the development and testing of embedded applications by helping you evaluating design decisions early. We use examples to show you how you can quickly tailor the code generation according to your needs. For example, you will learn about evaluating the code performance and optimizing the generated code for ROM, RAM or runtime. Similarly you will be learning about modeling patterns, automated tests and static analysis methods that help you implementing functional safety requirements.
Tracing Automotive Multi-Core Systems (AUTOSAR CP and AP)Embedded Software Timing is a topic of utmost importance when creating safe, secure and reliable embedded systems. This was true for single-core projects but became even more relevant for multi-core. Multi-core has been introduced to automotive applications on a broad basis a few years ago. However, securing the timing of multi-core applications still is a challenge. Tracing plays an important role in this context: it allows analyzing the timing on the real system closing the "theory-reality gap" model-based or simulation-based approaches might suffer. AUTOSAR AP adds yet more complexity and more fundamental changes. The talk will introduce a timing perspective for AUTOSAR AP - tracing can function as a bridge from the "old" CP to the "new" AP world.
How to Tackle the Challenge of Both High Performance and Safety in High Voltage EV ArchitecturesIn all kinds of Electric Vehicles (EV) the portion of safety relevant real time software is increasing. To be able to meet this need, tools like the TASKING Compiler and Embedded Profiler are required to make best use of the performance of the AURIX/2G. ISO26262 qualified/certified tools/software reduce the risk a lot to reach the certification of the (sub) system
Functional Safety in MultiCore Systems with Suitable Software ComponentsAs the number of computation cores in modern safety multi-core controllers increases, so are the requirements for development. Modern software components help the developer to achieve the safety goals and stay within the project within the given time and budget.
Using selected examples, practical solutions for the AURIX will be demonstrated.
We will gladly answer your questions:
GEROTRON COMMUNICATION GmbH
Phone: 089 856 10 72
Fax: 089 89 55 69 – 29
82152 Martinsried, Germany